14th International Conference on
Information Technology: New Generations

ITNG 2017
April 10-12, 2017, Las Vegas, Nevada, USA






Track Chairs:


Fangyang Shen

New York City College of Technology (CUNY)

Brooklyn, NY, USA



Mei Yang

University of Nevada

Las Vegas, NV, USA



TPC Members:

Yang (Cindy) Yi
University of Missouri- Kansas City

Yanqing Ji
Gonzaga University


Jun Zhang

University of Maryland, Eastern Shore


Bing Qi
Methodist University

Yijun Liu
Guangdong University of Technology


Shouling He

Vaughn College


Weiqing Sun

University of Toledo

Parks Fields
Los Alamos National Lab

Jon Stearley

Roberto Gioiosa
University of Rome

Wael R. Elwasif
Oak Ridge National Laboratory

Anthony Fong
City University of Hongkong          

Xiangdong Li
New York City College of Technology (CUNY)

Shaobai Kan
John Jay College, CUNY

 Hsing-Bung Chen
Los Alamos National Lab

Shengli Yuan
University of Houston














 Track on High-Performance Computing Architectures and Computer Education




The High-Performance Computing Architectures and Computer Education Track on ITNG 2017 is intended to provide a high-quality forum for researchers and practitioners to present their latest theoretical and practical work in this rapidly-changing area. Original papers are solicited in all aspects of high-performance computing architectures and Computer Education.



Topics of interest include, but are not limited to, the following:

System-on-chip and network-on-chip architectures

Multicore processor architecture

Application modeling and mapping schemes for multicore/SoC systems

Multicore computing and programming techniques 

Power-efficient architectures and techniques for multicore/SoC systems

High performance software systems and its applications, such as agent systems

Embedded and reconfigurable architectures

Nanocomputers and nano-circuits

Secure and reliable processor designs

Advanced computer architectures for general and application-specific enhancement

Parallel computer architectures

Cloud Computing

Application-specific processor/architecture designs

Cache and memory systems

High-performance I/O systems

Interconnect and network interface architectures

Microarchitecture design techniques: instruction-level parallelism, pipelining, caching, branch prediction, multithreading

Computer arithmetic

Innovative hardware/software trade-offs

Modeling and performance analysis

Complier designs

Security  and Reliability Issues in Storage Systems

Tools and methodology for architecture designs

Verification and testing techniques                                                                                                                                        

Wireless Technology in Industry Networks 

Cyber-physical Systems

Computer Education

Engineering Education


Paper Submission:

Papers must represent high quality and previously unpublished work, not currently under review by another conference,

workshop, or journal. Your submission should include the author names, complete mailing addresses, telephone and

fax numbers, and the email addresses of the authors. Interested authors should email a 6-page summary

of their original and unpublished work including 5 keywords to ITNG 2017.


Evaluation Process:

Papers will be evaluated for originality, significance, clarity, and soundness. Per ITNG policy, except for invited papers,

all papers will be reviewed by at least three independent reviewers.


Best Student Paper:

The Best Student Paper will be awarded at the conference. To be eligible, the student must be the sole author of

the paper, or the first author and primary contributor. (The winner of the award will present the paper in

a plenary session at the conference). A cover letter to the General Chair/Track Chair must identify the

paper as a candidate for this competition at the time of submission.


Important Dates:

Submission Deadline:   Oct. 28, 2016
Author Notification:      Dec 16, 2016
Advance Registration:   Jan. 13, 2017
Camera Ready:               Jan. 13, 2017


Important Notice:

The best quality selected papers will be recommended to be published in a special issue in Journal of Computer and Electrical Engineering (Elsevier).