|
|
Week
|
Date
|
Lect.
|
Topic
|
Reading
|
1
|
Aug 22
|
1
|
Digital Computers and
Numbers
|
1.1 - 1.3
|
|
Aug 24 |
2
|
Number Base Conversion |
1.3
|
2
|
Aug 29 |
3
|
Decimal Conversion and BCD
Addition |
1.3–1.4
|
|
Aug 31 |
4
|
Boolean Algebra |
2.1–2
|
3
|
Sep 5 |
5
|
Gates |
2.6
|
|
Sep 7 |
6
|
Canonical Expressions |
2.3
|
4
|
Sep 12 |
7
|
K-Maps |
2.5
|
|
Sep 14 |
8
|
Design Hierarchy and
Analysis |
3.1–3.4
|
5
|
Sep 19 |
9
|
Integrated Circuits |
3.4
|
|
Sep 21 |
10
|
ROMs, PLAs and FPGAs |
3.5–6
|
6
|
Sep 26 |
11
|
Decoders and Encoders |
4.1–4
|
|
Sep 28 |
12
|
Multiplexers and Adders |
4.5-6,5.2
|
7
|
Oct 3 |
13
|
Binary Subtraction and 2’s
Complement |
5.3–4
|
|
Oct 5 |
14
|
Carry Look-Ahead Adder
& Multipliers |
5.2,5
|
8
|
Oct 10 |
|
Exam 1 |
1–5 |
|
Oct 12 |
|
Fall Break - no class |
|
9
|
Oct 17 |
15
|
Latches and Flip-Flops |
6.1–3
|
|
Oct 19 |
|
No Class
|
TBD
|
10
|
Oct 24 |
16
|
Sequential Circuit
Analysis, Mealy/Moore Models |
6.4
|
|
Oct 26 |
17
|
Sequential Circuit Design |
6.5
|
11
|
Oct 31 |
18
|
Mealy/Moore Design Circuits |
|
|
Nov 2 |
19
|
Mealy vs. Moore Design |
|
12
|
Nov 7 |
20
|
Registers and Counters |
7.1–5 |
|
Nov 9 |
21
|
BCD Counters |
7.6 |
13
|
Nov 14 |
|
Exam 2 |
6–7 |
|
Nov 16 |
22
|
Memory |
9.1–2 |
14
|
Nov 21 |
23
|
RAM |
9.3–6 |
|
Nov 23 |
|
Thanksgiving - no class |
|
15
|
Nov 28 |
24
|
Register Transfer Logic |
??
|
|
Nov 30 |
25
|
Datapath |
10.1–2 |
16
|
Dec 5 |
26
|
Machine Sequencing and
Control |
8.1–8.4 |
|
Dec 7 |
|
Review for Final |
|
|