There is no lab on 15th of July 2015. Instead I will go through all the homework and midterm exam questions.

The spice netlist of D Flip Flop from the lecture slide no 25 can be found here.

Channel length modultation proof from Sandra and Smiths book can be found here.

PMOS transistor animation can be found here.

Load line analysis which I shown in class on 2nd of June can be found here.

Lab no.1 Slides can be downloaded by clicking here. Answer these questions for finishing your lab no 1

Welcome all to the world of CMOS Electronics.

Topics

Class Timing: 11:00 am - 12:15 pm

Days: Monday, Tuesday, Wednesday and Thusday

Room No: ECE- 210

Books: Primary -- CMOS Digital Integrated Circuits: A First Course by Charles F. Hawkins (Author), Jaume Segura (Author), Payman Zarkesh-Ha (Author)

Secondary -- CMOS VLSI Design: A Circuits and SystemsPerspective, 4/E by Neil Weste (Author), David Harris (Author)

Grading Policy: Homework - 15% | Project - 20% | Labs - 15% | Midterm Exam - 20% | Final Exam - 30%

Lab Hours : TBA in the room no-ECE311

Lab Webpage : http://ecelabs.pbworks.com/ECE-321L

Introduction to Digital Electronics
- Logic Gates and Boolean Algebra
- Combinational and Sequential Circuit
- Circuit Analysis
- Diode Circuit Aanlysis
Solid State Physics
- Material Fundatmentals
- Instrinsics and Extrinsics Semiconductors
- The pn Juction
- Biasing of pn Juction
MOSFET Physics
- MOSFET I-V Characteristics
- MOSFET Scaling and Issues
- Basic Digital Circuits with MOSFETs
- CMOS Power, Delay and Leakage Power Modeling
- Gate Sizing (Inverter Chain)

Combination Logic Design
- Nand and NOR Gates Design
- Pass Gate and Transmission Gate
- Domino Logic
- NORA CMOS Logic
Sequential Logic Gates Design
- CMOS Latches
- CMOS Edge-Triggered Storage Element
- Setup and Hold time, Clock jitter and Skew
- Clock Generation Circuitry
IC Memory Circuits
- SRAM Memories
- DRAM Memories
- Memory Cell
- Memory Decoder
- Future Topics